Integrated circuits (ICs) can be implemented to perform a variety of functions. Some ICs can be programmed to perform specified functions. One example of an IC that can be programmed is a field programmable gate array (FPGA). An FPGA typically includes programmable circuitry implemented as an array of programmable tiles. These programmable tiles can include, for example, input/output blocks (IOBs), configurable logic blocks (CLBs), dedicated random access memory blocks (BRAM), multipliers, digital signal processing blocks (DSPs), processors, clock managers, delay lock loops (DLLs), and so forth.
In some cases, a programmable IC also includes an embedded processor system. The processor system can include a processor (e.g., central processing unit or “CPU”) coupled to memory. The memory is capable of storing program code and/or data. The processor is capable of accessing the memory to execute the program code and operate on the data. Further, the processor system is capable of interacting with circuitry and/or other systems implemented using the programmable circuitry of the programmable IC. A programmable IC of this variety is also called a System-on-Chip (SoC).
One benefit of using an SoC is that a task that can be implemented in software, e.g., as an executable process performed by the processor system, can be offloaded to a circuit implemented in the programmable circuitry. The circuit is functionally equivalent to program code that can be executed by the processor system to perform the task. The circuit, however, often provides one or more benefits that are not attainable through execution of the program code by the processor system. The benefit(s) can include faster operation, reduced power consumption, redundancy, etc. Despite the fact that the benefits may or may not include faster operation, the circuit is often referred to as a “hardware accelerator”.
Hardware accelerators are often made available to users as cores. In order to utilize a hardware accelerator, an application executed by the processor system must be able to invoke the hardware accelerator in the programmable circuitry of the SoC. One technique for accessing the hardware accelerator from the application is to manually write a software driver that allows the application to control the hardware accelerator through a register interface. The hardware accelerator, however, cannot be automatically inserted into hardware (e.g., a circuit design for the programmable IC) using hardware generation tools because there is no binding between the functions intended to access the hardware accelerator and the interfaces of the hardware accelerator.
In some cases, a user is able to manually generate metadata that specifies the missing bindings. Hardware generation tools are capable of using the metadata to create a static library that can be linked into an application. Creating the necessary metadata, however, is a manual process that is both time consuming and error prone. Moreover, to accurately create the metadata, e.g., manually write Extensible Markup Language (XML) files, the user must have significant knowledge of the hardware interfaces of the hardware accelerator. Often, the user wishing to access the hardware accelerator from an application is a software developer that lacks the necessary hardware expertise to understand operation of the hardware accelerator and to manually go through the hardware accelerator documentation in order to create the metadata necessary to generate the static library.